岡本和也教授が半導体国際会議ICEPにてKeynote Chairとして貢献（Professor Kazuya Okamoto Serves as a Keynote Chair at the International Conference on Electronics Packaging (ICEP)）

2026年4月13日から17日にかけて広島県で開催された、IEEE協賛のアジア最大級の半導体国際会議 ICEP（International Conference on Electronics Packaging） において、本研究科の岡本和也教授がKeynote（基調講演）Chairを務め、国際会議の円滑な運営および学術的発展に貢献しました。

Keynote講演には、広島に主要拠点を有するMicron Memory JapanよりSr. Manager 横井直樹氏を招聘し、「Chip-Package Interaction on High Bandwidth Memory」 と題した講演が行われました。AI半導体の中核技術であるHBM（High Bandwidth Memory）をテーマに、チップとパッケージの相互作用が性能および信頼性に及ぼす影響について、最新の技術動向が包括的に紹介されました。約500名規模の会場では活発な質疑応答が交わされ、参加者の高い関心を集めました（写真）。

また、岡本教授はPLP（Panel Level Packaging）セッションのSession Chairも担当し、共同研究者として 松橋祐介氏（ニコン） による招待講演「An Experience-Driven Advanced Digital Lithography System for Panel Applications」を支援しました。本講演では、次世代基板として注目されるパネルプロセスに向けて、高解像度と高アライメント精度を両立する新型デジタル露光装置「DSP-100」が紹介され、大きな注目を集めました。さらに同セッションでは、Samsung Electronics、釜山大学、Cadence Design Systems（写真）からも卓越した招待講演が3件行われました。

なお、岡本教授はICEP2021においても、「Future View: Technology merger strengthens evolution of semiconductor chips in the hyper-scaling AI/ML era」と題したKeynote講演を行っており、本国際会議への継続的な貢献を果たしています。

At the International Conference on Electronics Packaging (ICEP), held in Hiroshima Prefecture in April 2026, Professor Kazuya Okamoto of this graduate school served as a Keynote Chair, leading the keynote program and contributing to the conference's overall success.

From April 13 to 17, 2026, the IEEE‑sponsored ICEP—one of the largest international conferences on semiconductor packaging technologies in Asia—brought together researchers and industry leaders from around the world in Hiroshima. In his role as Keynote Chair, Professor Okamoto made significant contributions to the conference's smooth operation and academic advancement.

For the keynote session, Dr. Naoki Yokoi, Senior Manager at Micron Memory Japan, whose major operations are based in Hiroshima, was invited to deliver a keynote lecture entitled “Chip–Package Interaction on High Bandwidth Memory.” Centered on High Bandwidth Memory (HBM), a core enabling technology for AI semiconductors, the lecture provided a comprehensive overview of the latest technological developments, with particular emphasis on how chip–package interactions impact performance and reliability. The session attracted strong interest from attendees, and a lively and in-depth Q&A took place in a venue that accommodated approximately 500 participants (Photo).

In addition, Professor Okamoto also served as Session Chair for the PLP (Panel Level Packaging) session. In this role, he supported an invited lecture by his collaborator, Mr. Yusuke Matsuhashi (Nikon), entitled “An Experience‑Driven Advanced Digital Lithography System for Panel Applications.” The presentation introduced Nikon’s new digital exposure system, the DSP‑100, which achieves both high resolution and high alignment accuracy for panel‑based processes—an area gaining increasing attention as a next‑generation substrate technology—and drew considerable interest from the audience. The session further featured three distinguished invited presentations by speakers from Samsung Electronics (Dr. Takashi Kariya), Pusan National University (Prof. Haedo Jeong), and Cadence Design Systems represented by Dr. Ksenia Roze (Photo).

It is also noteworthy that Professor Okamoto previously delivered a keynote lecture at ICEP 2021 entitled “Future View: Technology Merger Strengthens the Evolution of Semiconductor Chips in the Hyper‑Scaling AI/ML Era.” His continued involvement underscores his sustained and significant contributions to the ICEP conference series.